- Design, develop, test, and verify complex digital circuits using DFT (Design for Testability) techniques.
- Collaborate with cross-functional teams to identify and resolve design issues related to scan insertion, clock domain crossing, and other DFT-related problems.
- Develop and maintain documentation of DFT plans, test cases, and results for internal stakeholders.
- Participate in root cause analysis of failures during silicon validation testing.
Job Requirements :
- 5-15 years of experience in DFT engineering with expertise in ASIC/FPGA development.
- Robust understanding of DFT architecture, including scan insertion methods such as ATPG/Veloce/Verilator.
- Experience working on high-speed interfaces like PCIe Gen2/3/4 or similar protocols.