Company Description AIonSi is a semiconductor solutions startup delivering VLSI design and verification, automotive functional safety, and artificial intelligence solutions to global semiconductor clients. Led by a team of seven industry experts, the company focuses on end-to-end support for complex SoC designs, taking ownership from concept through implementation. AIonSi positions itself as a one-stop platform committed to best-in-class service and uncompromised quality. The organization provides comprehensive expertise across IP and SoC design, integration, verification, gate-level simulations (GLS), and physical design. This environment offers experienced engineers the opportunity to work on cutting-edge projects with a strong emphasis on technical excellence and innovation. Role Description This is a full-time, on-site SOC Design version engineer role based in Bengaluru. The role involves leading and contributing to complex SoC and IP design activities, including architecture review, RTL design, RTL coding, and logic implementation for high-performance and low-power semiconductor products. Responsibilities include collaborating with cross-functional teams on physical design integration, timing closure, and design-for-test considerations, as well as ensuring design quality through verification support and debug. The engineer will review specifications, refine micro-architecture, optimize design for performance, power, and area, and support design versioning,



configuration management, and release processes. The role also includes mentoring team members, documenting design decisions, and participating in continuous improvement of design flows and methodologies. Qualifications
• Solid Logic Design and RTL Design skills, with a proven ability to translate specifications into efficient digital architectures.
• Proficiency in RTL Coding (e.g., Verilog, SystemVerilog, VHDL) and familiarity with associated synthesis and linting tools.
• Solid understanding of Computer Architecture concepts, including pipelines, caches, buses, memory subsystems, and performance optimization.
• Experience with Physical Design aspects such as floorplanning, timing, power, and area considerations, and close collaboration with PD teams.
• 8+ years of relevant experience in SoC or IP design and verification, preferably in complex, multi-clock and high-speed designs.
• Hands-on experience with EDA tools for design, synthesis, STA, and simulation, and familiarity with version control and configuration management.
• Ability to work effectively in cross-functional engineering teams, with strong analytical, debug, and problem-solving skills.
• Bachelor’s or Master’s degree in Electrical Engineering, Electronics, Computer Engineering, or a related technical field.
• Experience in automotive, functional safety, or AI-oriented SoC designs is an advantage.

📌 SOC/PCIe Design version engineer 8+ years (Bengaluru)
🏢 AIonSi
📍 Bengaluru