DV Engineer (SoC Design Verification) | Hyderabad | 8+ Years
Are you an experienced Design Verification professional with expertise in CPU subsystems and advanced verification methodologies? We are looking for a skilled DV Engineer (SoC) to join our team and contribute to the development of next-generation semiconductor solutions.
? Location: Hyderabad
? Experience: 8+ Years
Key Skills Required
✅ 8+ years of experience in Design Verification
✅ Solid debugging and issue analysis skills
✅ Expertise in CPU Subsystems Verification
✅ Proficiency in C Programming
✅ Strong knowledge of Verilog/SystemVerilog
✅ Hands-on experience with UVM (Universal Verification Methodology)
✅ Excellent problem-solving and verification fundamentals
Roles & Responsibilities
? Develop and execute comprehensive verification plans for SoC and CPU subsystems
? Create and maintain UVM-based verification environments and testbenches
? Develop test cases using SystemVerilog and C
? Debug complex design and verification issues to ensure high-quality silicon
? Collaborate closely with architecture, design, and validation teams
? Drive coverage closure and ensure design functionality meets specifications
Why Join Us?
✨ Work on cutting-edge SoC technologies
✨ Collaborate with highly skilled engineering teams
✨ Opportunity to solve complex verification challenges and drive product success