At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.
Experience : 2 to 3 years
Exposure on the CPU architecture Hands on experience in CPU Verification and ASM coding Positive exposure on SV, UVM, SVA-Assertion and checker writing Positive debugging knowledge
We’re doing work that matters. Help us solve what others can’t.
📌 Design Engineer Ii Pune (India)
🏢 Important Group
📍 India
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