Job Description
Implement DFT architecture and scan methodologies
Perform ATPG and fault coverage analysis
Work on MBIST/LBIST integration
Support silicon bring-up activities
Responsibilities
Scan insertion and verification
ATPG pattern generation
Test coverage analysis
Debug DFT-related issues
Collaborate with design and PD teams
Required Skills
DFT flow knowledge
ATPG and scan methodologies
Experience with Tessent/Synopsys tools preferred
Scripting skills preferred
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