Seeking an experienced PCIe design engineer for subsystem and SoC development with below requirements:
- B.Tech/M.Tech in Electronics/VLSI Engineering with 14+ years of experience in VLSI design and architecture
- Solid fundamentals in digital ASIC design, micro-architecture, and best RTL coding methods
- Domain expertise in PCIe Gen6/7 and PIPE protocols
- Knowledge of PLLs, Serdes, AMBA and serial protocols, DMA, memory organization, processors, and Silicon bring-up sequences
- Strong design, Emulation, and Silicon debug skills
- Ability to provide timely solutions to design problems
- Customer support with excellent communication and oratory skills
- Expertise in Synthesis, constraints, timing closure, and equivalence checks (Formality/Conformal)
- Experience in Lint/CDC/RDC tools