At Kandou, we are redefining the economics of AI infrastructure. Our mission is to democratise AI by significantly reducing the Total Cost of Ownership (TCO) of hardware systems — a critical barrier to scalable adoption.

Our proprietary MIMO-over-copper technology powers a high-performance, chiplet-based AI memory fabric that is both scalable and energy-productive . Unlike traditional interconnects, our solution reduces power consumption significantly while preserving high bandwidth and ultra-low latency — unlocking unprecedented efficiency for AI training and inference at scale.

Kandou's architecture is not just an incremental improvement — it's a foundational shift in how AI hardware is built for the future.

We are actively seeking an EDA/CAD Engineer, based either in UK (Cambridge or Reading), Switzerland (St-Sulpice), or India (Hyderabad or Bangalore)

Manage and maintain an integrated analog/digital EDA workplace, including installation, configuration, and support of tools such as Cadence Virtuoso, Synopsys platforms, and Siemens Calibre/AFS.

Flow development & automation: design, automate, and validate robust CAD flows for simulation, physical verification, parasitic extraction, and reliability analysis.

Methodology support:



provide expert guidance to analog and digital design engineers; optimize design methodologies for performance and quality.

PDK installation & support: contribute to installation, qualification, and deployment of PDKs for advanced technology nodes.

Strong programming skills: Shell, Python, Perl, Tcl, SKILL; Solid understanding of the full chip-design lifecycle and digital, analog, and mixed‑signal IC design flows.

collaborates effectively with engineering teams and vendors.

Proficient in EDA/CAD flow development while balancing stakeholder needs (quality, schedule, and compute efficiency).

Ability to quickly learn, understand, maintain, and enhance complex software design tools.

Experience

- Bachelor or Master of Science Degree, in Electrical Engineering, Computer Engineering, Computer Science.
- 10+ years in an EDA/CAD engineering supporting both analog and digital IC design teams.
- Proven experience at advanced technology nodes and associated PDKs. Cadence Pegasus), Parasitic Extraction (Cadence Quantus), and Digital Implementation (Synopsys Design Compiler & IC Compiler II; Proven experience at advanced technology nodes and associated PDKs.
- Deep data management experience (Git, Cliosoft) enabling consistent, flexible multi‑project/multi‑discipline flow setup and database tagging.

📌 Engineering CAD Designer (Secunderabad)
🏢 Kandou AI
📍 Secunderabad