Verification Engineer (Hyderabad)

Verification Engineer (Hyderabad)

03 Nov
|
Luxoft
|
Hyderabad

03 Nov

Luxoft

Hyderabad

Project description

This is a great prospect to work as part of a highly regarded team to deliver leading-edge solutions.

Responsibilities

- Tests the Xilinx Vivado FPGA implementation flow itself
- placer, routing, static timing analysis
- and analyses quality of results. EDA tool QA for an FPGA engineer, not ASIC verification.

Skills

Must have

- Xilinx Vivado, specifically the implementation flow
- FPGA design flow
- static timing analysis and design constraints
- digital / logic design
- debug skills
- 2-4 years of experience
- Experience: Minimum 2, maximum 4 years.

Nice to have

- EDA company experience
- scripting / automation (Tcl, Python)
- AI tool usage

Other

- Languages: English: B2 Upper Intermediate
- Seniority: Junior

📌 Verification Engineer (Hyderabad)
🏢 Luxoft
📍 Hyderabad

Reply to this offer

Impress this employer describing Your skills and abilities, fill out the form below and leave Your personal touch in the presentation letter.

Subscribe to this job alert:

Get the latest job offers by email for: verification engineer (hyderabad) / hyderabad