Job highlights

- Demonstration of AI-driven productivity improvements in Verification test case generation and coverage closure. Should have thrived in fast paced environments ( startup like) in the recent past.
- Create Subsystem Verification plan for PMBUS, AVS interface and sign off protocol compliance
- Formal verification coverage of critical control interfaces

- UVM based Verification setting
- SOC Integration verification and system level scenarios development
- GLS Verification including root causing down to flop level
- Code Coverage, functional coverage
- Fault Injection Campaign Execution for ASIL-D Products

Job Requirement
- Demonstration of AI-driven productivity improvements in Verification test case generation and coverage closure




- Should have thrived in fast paced environments ( startup like) in the recent past
- In Depth debug and Root cause analysis skills
- The team will be split across different activities ( Subsystem, Top Level, different chips which makeup the system) .

Disclaimer: This job posting has been aggregated from external source. Role details, content, and availability are subject to change. Applicants are advised to confirm the latest information directly on the company website before applying.

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