Analog Layout Engineer (Hyderabad)

Analog Layout Engineer (Hyderabad)

12 Nov
|
EdgeSilica Private
|
Hyderabad

12 Nov

EdgeSilica Private

Hyderabad

Company Description EdgeSilica Private Limited is a semiconductor services company specializing in high-quality VLSI design and engineering solutions for global customers. The organization focuses on physical design, design verification, SoC development, system software, and resource augmentation to help clients accelerate time-to-market. EdgeSilica combines strong technical depth, process-driven execution, and a customer-first approach to support startups, fabless companies, and product organizations across the semiconductor ecosystem. Teams are trained on industry-standard EDA tools and follow best practices in design quality, scalability, and confidentiality. The company is built for long-term partnerships, emphasizing flexible engagement models, reliable delivery, and future-ready semiconductor engineering services. Role Description The Analog Layout Engineer will be responsible for designing and implementing analog and mixed-signal layout structures for integrated circuits, ensuring compliance with design rules and performance requirements. Day-to-day activities include collaborating with circuit design engineers, creating efficient floorplans, performing layout optimization, running physical verification (DRC/LVS), and resolving layout-related issues.



The role involves working with industry-standard EDA tools, maintaining documentation, and supporting design reviews to meet project quality and schedule targets. This is a full-time, on-site position based in Hyderabad. Qualifications
• Solid skills in Layout Design and Analog Layout implementation for complex analog and mixed-signal blocks.
• Proficiency in Circuit Design, Analog Circuits, and understanding of device-level behavior and performance trade-offs.
• Experience in Physical Verification, including DRC, LVS, and other sign-off checks using industry-standard EDA tools.
• Knowledge of semiconductor processes, design rules, and layout best practices for reliability, matching, and noise reduction.
• Bachelor’s or Master’s degree in Electrical Engineering, Electronics, or a related field.
• Familiarity with tools such as Cadence Virtuoso, Mentor/Siemens Calibre, or equivalent layout and verification platforms.
• Ability to work collaboratively with cross-functional design teams, manage deadlines, and maintain high attention to detail.
• Prior experience in VLSI/analog layout in a semiconductor or design services environment is an advantage.

📌 Analog Layout Engineer (Hyderabad)
🏢 EdgeSilica Private
📍 Hyderabad

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