Hello Folks!!!

Greetings from ElevarSoC!

We are seeking for the position for Design Verification Engineer with 3-5 Years of experience for Hyderabad location.

Minimum Qualification

Following skillset is required

-- Solid Debug, UVM, System Verilog

-- Reading Specs and developing test plans

-- Monitors, scoreboards, sequencers, and sequences, that utilize scripts, System Verilog, UVM, and methodologies to increase the rate with which bugs are found and resolved

-- Demonstrated technical expertise in functional verification of complex designs including test planning, test bench development, stimulus generation, checking, and functional coverage

-- Candidates should be comfortable checking our builds, navigating big test benches, analyzing coverage,



and adding or enabling extra debug, must be willing to dig into fail and understand what is happening

Preferred Qualification

3-6 Year of industry experiences in the following areas: -

- Basic of digital design concepts, fifo etc.
- Understand of interconnect protocols like AHB/AXI/ACE/ACE-Lite/NoC concepts.
- Basic understanding/coding skills for SV/UVM

Apply Now!

Share your resume to [email protected]

#Hiring #Hyderabadjobs #ElevarSoCTechnologies #SandeepPenumala #DesignVerification #Engineer #SV #UVM #AHB #AXI

📌 Design Verification Engineer (Hyderabad)
🏢 ElevarSoC Technologies
📍 Hyderabad