We are seeking experienced FPGA Verification Engineers to join our team and drive the verification of complex FPGA-based systems. The role involves working across the full verification flow, ensuring design quality, and collaborating with cross-functional teams to deliver robust solutions.
Key Responsibilities
Execute complete FPGA verification flow, from test planning to coverage closure.
Develop and implement testbenches for Ethernet protocol and other high-speed interfaces.
Perform code coverage analysis to ensure thorough validation of designs.
Create automation scripts using TCL scripting and other scripting languages to streamline verification processes.
Collaborate with design, architecture, and validation teams to identify and resolve issues.
Explore creative approaches,
including AI agents and prompt engineering, to enhance verification efficiency.
Required Skills and Experience
5+ years of relevant experience in FPGA verification.
Solid expertise in verification methodologies (UVM, SystemVerilog).
Hands-on experience with Ethernet protocol verification and debugging.
Proficiency in scripting languages such as TCL, Python, or Perl.
Solid understanding of simulation tools, waveform analysis, and debugging techniques.
Excellent communication and collaboration abilities.
Preferred Qualifications
Exposure to AI-driven verification techniques and automation frameworks.
Robust analytical and problem-solving skills with attention to detail.