Job Description
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Designation: Director-FPGA RTL Design
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Bangalore
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Job Description:
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Ø As a director will be working on our existing and next generation Protocol Analysers and exercisers and similar products.
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Ø Manages the FPGA design team
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Ø Develop a new products to meet needs top semiconductor for their pre and post silicon validation
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Ø The role involves contributing to the entire FPGA based product development flow starting from requirement analysis till final product testing in lab environment.
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Ø The candidate will be responsible for architecture/micro-architecture design and implementation of the logic in Verilog for targeted FPGA, writing test benches to validate the design etc.
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Ø Job involves working with team of FPGA Design Engineers and deliver the products as planned
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Ø Guides the team to Debugging of designs to resolve complex design issues.
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Ø Job involves frequent interaction with board design, software, testing and lab teams to deliver the product meeting the customer requirements.
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Ø Job involves understanding and working with interfaces such as PCIe, GigE, MPHY/UFS, DPHY/CSI/DSI, USB, SD, eMMC, I3C/I2C, SPI/QSPI etc.
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Ø Contributing to/participating in internal design reviews to ensure adherence to the company FPGA design process.
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Ø Maintaining all design documents and code base in Github
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Ø Participate and Contribute to the standard bodies such as PCIeSig, MIPI Alliance, SD Association and USB Org
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Ø Owns responsibility filing patents.
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Ø International travel is involved
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Qualifications:
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BE/ME in Electronics from a reputed college. Specialization in VLSI and Embedded Design is a plus.
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Ø 16 to 18 years of experience in designing and implementing FPGA based solution in Xilinx or Altera FPGA, preferably FPGA based product development experience.
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Ø FPGA Based High speed IP development such as PCIe 5.0/6.0, USB4 or DP2.0
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Ø Has expertise in verification of RTL code
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Ø Must have experience in System Design with Xilinx/Altera FPGA devices with relevant tools.
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Ø Deep expertise in FPGA based data plane design to manage the high-speed serial bus data
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Ø Must have experience in Verilog and/or VHDL coding.
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Ø Must have very positive understanding of physical layer of SERDES of XILINX-AMD or Intel FPGA
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Location: Bengaluru, India
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Skills:
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Xilinx
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Altera
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PCIe
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USB
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DP
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Verilog
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VHDL
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Serdes
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GiGE
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UFS
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CSI
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DSI
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MIPI
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Contact:
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Uday
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Mulya Technologies
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[email protected]
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"Mining The Knowledge Community"
📌 Director-FPGA RTL Design (Bengaluru)
🏢 Mulya Technologies
📍 Bengaluru