SOC RTL Design Verification /n Experience: 4 to 10 Years /n Location: Bangalore /n Key Responsibilities: /n /n

- Verification of SOC RTL (This is a DV Req) : FW-HW co-verification at SOC level, positive understanding of SOC boot flow, integration level verification

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- Development and verification of post-si validation sequences using C/C++

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- Create methodology-based (UVM) verification testbenches and components from scratch at SOC level along with re-usability of IP level components.

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- Experienced with Verilog, System Verilog, and C or C++

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- Good understanding of JTAG protocol

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- Contributes to test plan development.

/n /n Candidate past experience requirements, /n /n

- Should have experience in system-level Verification.

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- DDR prior experience is not mandatory.

/n /n About Company: /n ACL Digital, a leader in digital engineering and transformation, is part of the ALTEN Group. At ACL Digital, we empower organizations to thrive in an AI-first world. Our expertise spans the entire technology stack, seamlessly integrating AI and data-driven solutions from Chip to cloud. By choosing ACL Digital, you gain a strategic advantage in navigating the complexities of digital transformation. Let us be your trusted partner in shaping the future. /n www.acldigital.com

📌 RTL Design Verification Engineer (Bengaluru)
🏢 ACL Digital
📍 Bengaluru