Be part of HCLTech's Semiconductor team and drive advanced Design-for-Test (DFT) solutions for complex So C and ASIC designs. We're looking for experienced professionals with deep expertise in DFT architecture, scan implementation, ATPG, compression techniques, and silicon bring-up across leading semiconductor programs.
Key Responsibilities
Lead end-to-end DFT implementation for complex So Cs, including Scan, MBIST, LBIST, and ATPG.
Define DFT architecture and drive test coverage optimization for high-quality silicon.
Expertise in Synopsys/Tessent DFT tools and advanced semiconductor design methodologies.
Collaborate with cross-functional teams to ensure successful DFT integration and silicon bring-up.
Provide technical leadership and mentoring while driving DFT sign-off across projects.
Regards,
Karthik Kumar adasunarsima.karthik@
📌 Dft Engineer (Kerala)
🏢 HCLTech
📍 Kerala
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