Engineer Trainee (Bengaluru)

Engineer Trainee (Bengaluru)

14 Sep
|
SmartDV Technologies
|
Bengaluru

14 Sep

SmartDV Technologies

Bengaluru

- B.E or MTech from reputed university with 0-2 years experience.
- Robust understanding of Digital design
- Working experience with Verilog or VHDL or SystemVerilog
- Experience in writing C or C++
- Understanding of OOPS.
- Knowledge of Perl or Python or TCL scripting languages
- Very good academic track record

Send resumes to [email protected]

📌 Engineer Trainee (Bengaluru)
🏢 SmartDV Technologies
📍 Bengaluru

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