Position: DFT Engineer

Location: Bangalore

Experience: Freshers

Employment Type: Full time

Key Responsibilities

- Develop and implement DFT architecture for ASIC/SoC designs.
- Work on Scan Insertion, Scan Compression, ATPG, MBIST, LBIST and JTAG.
- Develop and analyze DFT specifications and test methodologies.
- Perform ATPG pattern generation and fault simulation.
- Analyze and improve test coverage and test quality.
- Work closely with RTL, Physical Design, Verification and Validation teams.
- Debug DFT-related issues and support timing and physical design requirements.
- Participate in DFT verification, simulation and sign-off activities.
- Support silicon bring-up and post-silicon debug, where required.

Required Technical Skills

✅ Strong understanding of DFT concepts and methodologies

✅ Experience with Scan / Scan Chain

✅ Knowledge of ATPG and Fault Coverage

✅ Experience with MBIST / LBIST / JTAG

✅ Understanding of ASIC/SoC design flow





✅ Knowledge of Verilog/SystemVerilog is an advantage

✅ Understanding of RTL, synthesis and physical design concepts

✅ Experience with industry-standard EDA tools such as Synopsys, Cadence or Siemens EDA is preferred

Good debugging and problem-solving skills

Educational Qualification

B.E./B.Tech/M.E./M.Tech in:

- Electronics & Communication Engineering
- Electrical Engineering
- Electronics Engineering
- VLSI / Microelectronics
- Computer Engineering or related field

Pay: ₹327,115.67 - ₹555,000.00 per year

Benefits

- Food provided
- Paid sick time
- Provident Fund

Ability to commute/relocate:
- Bengaluru, Karnataka: Reliably commute or planning to relocate before starting work (Preferred)

Education:
- Bachelor's (Preferred)

Work Location: Hybrid remote in Bengaluru, Karnataka

📌 DFT Engineer (Bengaluru)
🏢 Corp Match Private
📍 Bengaluru