Company Description Seminovaa™ is a deep-tech semiconductor design services company focused on innovation in ASIC/SoC design and verification, physical implementation, and DFT. The company partners with global semiconductor leaders to deliver high-performance, first-time-right silicon solutions. Guided by a vision to be a catalyst in the evolving semiconductor landscape, Seminovaa combines strong technical expertise with a commitment to precision and value.

Its mission is to empower innovation through cutting-edge semiconductor solutions that help clients accelerate time-to-market while maintaining quality and reliability. Seminovaa provides end-to-end design and development services, including ASIC/SoC design and verification, RTL to GDSII, DFT and STA, post-silicon validation, test engineering, IP integration, and custom silicon solutions.

Role Description The PD – Lead is a full time, on-site role based in Bengaluru, responsible for leading physical design activities for complex ASIC/SoC projects. This role involves ownership of the complete physical design flow, including floorplanning, placement, clock tree synthesis, routing, timing closure, power optimization, and design-for-manufacturability. The PD – Lead will collaborate with front-end design, verification, DFT, STA, and post-silicon teams to ensure successful tape-out and high-quality, first-pass silicon.

Day-to-day responsibilities include guiding junior engineers, reviewing constraints and implementation strategies, resolving design issues,



and driving continuous improvements in methodologies and flows. The role also requires close coordination with clients and internal stakeholders to meet project schedules, quality targets, and performance goals.

Qualifications

- Candidates should possess strong physical design skills, including experience with floorplanning, placement, clock tree synthesis, routing, and timing closure.
- Candidates should have expertise in STA, power and signal integrity analysis, and familiarity with DFT considerations in physical implementation.
- Candidates should be proficient in industry-standard EDA tools for physical design and sign-off (e.g., Cadence, Synopsys, or equivalent).
- Candidates should demonstrate solid understanding of ASIC/SoC design flows, from RTL to GDSII, including constraints management and design-for-manufacturability.
- Candidates should have experience leading small technical teams, mentoring engineers, and conducting design and implementation reviews.
- Candidates should have strong analytical and problem-solving abilities, with attention to detail and a focus on quality and first-time-right execution.
- Candidates should possess effective communication and collaboration skills to work with cross-functional and client teams.
- A bachelor’s or master’s degree in Electrical Engineering, Electronics, or a related field, and relevant experience in semiconductor physical design, is highly beneficial.

📌 PD - Lead (Bengaluru)
🏢 Seminovaa
📍 Bengaluru