Design and Development of FPGA based Systems for Defence applications.
2+ years experienced candidate required in the field of RTL design and development (Verilog or VHDL) for FPGA based embedded systems.
2+ years experienced candidate required in the field of MATLAB design
Responsibility:
Should implementing RTL design as per the requirements.
Determine architecture design, logic design and system simulation.
Evaluation all aspects of the process flow from high-level design to synthesis, place and route and bit-stream generation
Integration of third-party IP
Create self-checking test benches from scratch.
Desired Skills:
Familiar with Xilinx Vivado or Quartus Prime.
Work experience performing RTL Synthesis.
Work experience creating a self-checking simulation test benches from scratch.
Understanding of MATLAB codes.
📌 Rtl & Matlab Design And Development Engineers Bengaluru
🏢 Traana Technologies
📍 Bengaluru
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